Method for generating a data block for transmission using a cpm scheme

ABSTRACT

A method for generating a data block for transmission using a continuous phase modulation scheme is disclosed. In one aspect, the method includes inserting payload data in the data block, the payload data having a plurality of payload symbols, each involving an state change in a continuous phase modulation waveform generated from the data block in one of two opposite directions. It may include inserting state compensation data in the data block for cancelling out the state changes, such that the waveform has an end state at the end of the data block equal to a begin state at the beginning of the data block. The state compensation data is determined by determining from the state changes an overall state change caused by the payload data over the waveform and by selecting a set of compensation symbols for the state compensation data on the basis of the overall state change.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a continuation of PCT Application No. PCT/EP2008/066010, filed Nov. 21, 2008, which claims priority under 35 U.S.C. §119(e) to U.S. provisional patent application 60/989,763 filed on Nov. 21, 2007. Each of the above applications is incorporated herein by reference in its entirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a method for generating a data block for transmission using a continuous phase modulation (CPM) scheme.

2. Description of the Related Technology

There is an explosive growth in the demand for wireless connectivity. Short ranges wireless links will soon be expected to deliver bit rates of over 2 Gbit/s. Worldwide, recent regulation assigned an at least 3 GHz-wide frequency band at 60 GHz to this kind of applications. Chips for mobile consumer devices need to be power efficient; hence a suitable modulation technique for 60 GHz transceivers should allow an efficient operation of the power amplifier (PA). Moreover, these chips need to be cheap so the modulation technique should have a high level of immunity to the front end nonidealities.

CPM signals posses these properties. They have a perfectly constant envelope which makes them much more favorable than orthogonal frequency-division multiplexing (OFDM) as cheap, power efficient nonlinear PA's can be used instead or expensive, inefficient linear ones. They are also more robust against other front end imperfections such as phase noise and analog-to-digital converter clipping and quantization. Moreover, they combine attractive spectral properties with excellent power efficiency.

It is known that just the insertion of a cyclic prefix (CP) is not sufficient to make the convolution of a CPM signal with a linear channel appear to be a cyclic convolution, enabling FDE with one complex multiplication per sample. An extra subblock has to be inserted in each block to deal with the memory in the CPM signal. In WO 2007/068994, a method is presented to append a cyclic extension to a continuous phase modulation signal. Only N/2 symbols in a block are used to transmit data, while the other N/2 are chosen as the inverse of the first N/2. Of course, the block will satisfy the cyclicity constraints. The overhead is huge, halving the useful bit rate.

SUMMARY OF CERTAIN INVENTIVE ASPECTS

Certain inventive aspects relate to a method for generating a data block for transmission using a continuous phase modulation scheme with which cyclic continuous phase modulation signals can be generated with a smaller loss on bit rate.

In an embodiment, a method for generating a data block for transmission using a continuous phase modulation scheme is presented. The method comprises the step of inserting payload data in the data block. The payload data comprises a plurality of payload symbols, each involving a state change in a continuous phase modulation waveform generated from the data block (for example a phase rotation in one of two opposite directions). The method further comprises the step of inserting state compensation data in the data block for cancelling out the state changes, such that the waveform has an end state at the end of the data block equal to a begin state at the beginning of the data block. The state compensation data is determined by determining from the state changes an overall state change. The overall state change is caused by the payload data over the waveform. The state compensation data is determined by selecting a set of compensation symbols for the compensation data on the basis of the overall state change. The compensation symbols are selected on the basis of the associated state change in the waveform, to collectively cancel out the overall state change. Hence, a cyclic continuous phase modulated signal is generated.

In one aspect, the state compensation data is determined on the basis of the overall state change caused by the payload data and an appropriate set of compensation symbols is selected to cancel out this overall state change. In this way, cyclicity of the generated signal can be achieved with less compensation symbols than in the prior art, where a complete antipode of the payload data is required. Hence, more of the data block is available for the payload data and a higher bit rate can be achieved.

The way in which the state compensation data is determined according to one inventive aspect clearly some advantages. Less compensation symbols are needed in comparison to the prior art, reducing the overhead. The state compensation data can be calculated based on just the symbols of the current data block so the algorithm can work on a per-block basis, without knowledge of previous blocks. Moreover it is compatible with differential precoding of a popular class of CPM signals, which approximately halves the bit error rate compared to uncoded CPM without any extra overhead or complexity increase.

In one embodiment, the state compensation data is placed on predetermined positions in the data block, which can facilitate detection and removal of the state compensation data on receiver side. Alternatively, the state compensation data can also be grouped and preceded by a predetermined identifier.

In one embodiment where the continuous phase modulation scheme comprises predetermined modulation parameters (such as for example a modulation index, a number of symbol levels, length of the pulse shaping filter or other), the state compensation data is organized as a subblock having a minimum required length which is determined on the basis of at least one of the parameters of the CPM scheme, preferably at least the modulation index. This has the advantage that each generated data block contains a subblock of the same length in the same position, so that the detection and removal of the state compensation data on receiver side can be facilitated. As used herein, this subblock is called “intrafix”. It can be inserted after the payload data, before or somewhere in between. Its minimum length is always sufficient if a certain relation to the total block length is respected. In alternative embodiments, the state compensation data can also be uniformly spread over the payload data, for example each third, fourth, . . . n-th symbol being a compensation symbol.

In one embodiment, the state changes are phase rotations. In other embodiments, the state changes may further comprise correlative state changes. Phase state and correlative state are known terms in the field of CPM, so that they require no further explanation here.

In one embodiment, the continuous phase modulation scheme is a precoded continuous phase modulation scheme in which the data block is part of a larger data structure in which the data block is sandwiched between an equal cyclic pre- and postfix. These cyclic pre- and postfixes may also comprise payload data and state compensation data determined by the method according to one aspect. In general, the method can be applied on the data block alone, on the cyclic pre/postfix alone or on both, the latter being preferred for reasons of achieving cyclicity while maximizing bit rate.

In one embodiment, a training sequence (TS) is used instead of a cyclic prefix (CP). A TS offers additional known symbols and therefore can enhance synchronization and—potentially—channel estimation, while keeping the same performance as with a CP.

Another inventive aspect relates to a device for generating a data block for transmission using a continuous phase modulation scheme. The device comprises a payload insertion module configured to insert payload data in the data block, the payload data comprising a plurality of payload symbols, each involving a state change in a continuous phase modulation waveform generated from the data block. The device may further comprise a state compensation insertion module configured to insert state compensation data in the data block for cancelling out the state changes, such that the waveform has an end state at the end of the data block equal to a begin state at the beginning of the data block, wherein the state compensation data is determined by a) determining from the state changes an overall state change caused by the payload data over the waveform, and b) selecting a set of compensation symbols for the state compensation data on the basis of the overall state change, the compensation symbols each involving a state change in the waveform and collectively cancelling out the overall state change.

Another inventive aspect relates to a system implementing the method above. The system may comprise a processor configured to execute instructions and perform the method above. The method may be a general purpose, or a special purpose processor, and may be for inclusion in a device, e.g. a chip that has other components that perform other functions. Thus, one or more aspects of the present invention can be implemented in digital electronic circuitry, or in computer hardware, firmware, software, or in combinations of them. Furthermore, aspects of the invention can be implemented in a computer program product tangibly embodied in a transitory or non-transitory computer-readable medium carrying machine-readable code for execution by a programmable processor. Method steps in the foregoing embodiments may be performed by a programmable processor executing instructions to perform functions of those aspects of the invention, e.g. by operating on input data and generating output data.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be further elucidated by means of the following description and the appended drawings.

FIG. 1 shows structures of possible overall data structures which can be generated with the embodiments of method.

FIG. 2 shows schematically possible communication system models for implementing embodiments of the method.

FIG. 3 shows examples of possible cumulative state constellations.

FIG. 4 plots the BER performance as a function of Eb/No for some illustrative examples.

DETAILED DESCRIPTION OF CERTAIN ILLUSTRATIVE EMBODIMENTS

The present invention will be described with respect to particular embodiments and with reference to certain drawings but the invention is not limited thereto but only by the claims. The drawings described are only schematic and are non-limiting. In the drawings, the size of some of the elements may be exaggerated and not drawn on scale for illustrative purposes. The dimensions and the relative dimensions do not necessarily correspond to actual reductions to practice of the invention.

Furthermore, the terms first, second, third and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a sequential or chronological order. The terms are interchangeable under appropriate circumstances and the embodiments of the invention can operate in other sequences than described or illustrated herein.

Moreover, the terms top, bottom, over, under and the like in the description and the claims are used for descriptive purposes and not necessarily for describing relative positions. The terms so used are interchangeable under appropriate circumstances and the embodiments of the invention described herein can operate in other orientations than described or illustrated herein.

The term “comprising”, used in the claims, should not be interpreted as being restricted to the means listed thereafter; it does not exclude other elements or steps. It needs to be interpreted as specifying the presence of the stated features, integers, steps or components as referred to, but does not preclude the presence or addition of one or more other features, integers, steps or components, or groups thereof. Thus, the scope of the expression “a device comprising means A and B” should not be limited to devices consisting only of components A and B. It means that with respect to the present invention, the only relevant components of the device are A and B.

Below, methods are described for generating a data block for transmission using a continuous phase modulation (CPM) scheme. In addition to a cyclic prefix, state compensation data in the form of a so-called intrafix of payload data-dependent symbols is inserted in each block to cope with the memory of the CPM signal, i.e. for cancelling out overall or cumulative state change caused by the payload data, such that the waveform becomes cyclic. Methods are proposed for constructing such an intrafix, yielding a CPM signal with properties enabling frequency domain equalization (FDE) on receiver side. The intrafix and its minimum required length are determined on the basis of the parameters of the CPM signal, such as for example the modulation index, the number of symbol levels and the length of the pulse shaping filter.

FIG. 1 shows data structures containing data blocks according to one embodiment. “Data” is used to refer to payload data, “Intrafix” is used to refer to a subblock containing state compensation data. The combination of a “Data” sequence and an “Intrafix” forms an embodiment of a “data block” as defined in the claims. FIG. 1 a shows a data block sandwiched between an equal cyclic pre- and postfix, FIG. 1 b shows a data block preceded by a training sequence (on which the method according to various embodiments can be applied as well), FIG. 1 c shows a data structure in which a data block sandwiched between an equal cyclic pre- and postfix in which a second intrafix is inserted.

FIG. 2 a-c shows the corresponding communication system schemes respectively corresponding to the data structures of FIG. 1 a-c. The top parts each time represent the transmitter side, which comprises a block for intrafix insertion; the bottom parts each time represent the receiver side, which comprises a block for intrafix deletion.

In general, a transmitted CPM signal has the form:

$\begin{matrix} {{s\left( {t,a} \right)} = {\sqrt{\frac{2E_{S}}{T}}^{j\; {\varphi {({t,a})}}}}} & (1) \end{matrix}$

Where a contains the sequence of M-ary data symbols a_(n)ε{±1,±3, . . . , ±(M−1)}.The symbol duration is T and E_(S) is the energy per symbol, here normalized to E_(S)=1. The transmitted information is contained in the phase:

$\begin{matrix} {{\varphi \left( {t,a} \right)} = {2\pi \; h{\sum\limits_{n}{a_{n} \cdot {q\left( {t - {nT}} \right)}}}}} & (2) \end{matrix}$

where h is either a single modulation index or is drawn from a predetermined set of parameters of the CPM scheme. In the latter case, the method can then be used for each group of symbols corresponding to the same modulation index. q(t) is the phase response, related to the frequency response ƒ(t) by the relationship q(t)=∫_(−∞) ^(t)f(τ)dτ The pulse ƒ(t) is a smooth pulse shape over a finite time interval 0≦t≦LT and zero outside, where L is an integer. The function ƒ(t) is normalized such that

${\int_{- \infty}^{\infty}{{f(t)}{t}}} = {\frac{1}{2}.}$

It can be seen that the phase φ(t,a) during interval nT≦t≦(n+1)T can then also be written as:

$\begin{matrix} {{\varphi \left( {t,a} \right)} = {{h\; \pi {\sum\limits_{i = 0}^{n - L}a_{i}}} + {2\; \pi \; h{\sum\limits_{i = {n - L + 1}}^{n}{a_{i} \cdot {q\left( {t - {iT}} \right)}}}}}} & (3) \end{matrix}$

We distinguish two types of memory in the CPM signal: the phase state

$\begin{matrix} {\theta_{n} = {h\; \pi {\sum\limits_{i = 0}^{n - L}{a_{i}{mod}\; 2\; \pi}}}} & (4) \end{matrix}$

where .=. mod x is the modulo x operator which applies to both sides of the equation, and the correlative state

σ_(n)=(a _(n-1) ,a _(n-2) , . . . , a _(n-L+1))  (5)

Together, they form the “state” of the CPM signal χ_(n) (θ_(n),σ_(n)) which captures all the memory. Taking this memory into account has the advantage that FDE can be enabled.

We consider a block-based communication system as explained in [1]. Parameters with respect to the l^(th) block are denoted with a superscript (l). The last N_(P) symbols a_(s) ^((l)) of each block a^((l)) of length N are copied in front of the block, creating blocks of length N_(T)=N+N_(P), see FIG. 1 a. Attaching this CP a_(p) ^((l)) in the transmitter and discarding it in the receiver makes the convolution with the channel appear to be a cyclic convolution. The channel can then be equalized in the FD with one complex multiplication per sample.

To construct a data block which yields a cyclic CPM signal we also take the memory introduced by the CPM modulation into account. This memory is reflected by the state χ_(n) ^((l)) of the modulator at symbol interval n in block l. From FIG. 1 a it can be seen that the condition to get a cyclic CPM signal with period NT after discarding the CP is

χ_(N) _(P) ^((l))=χ_(N) _(T) ^((l))  (6)

or equivalently:

θ_(N) _(P(l)) =θ_(N) _(T) ^((l))  (7)

and

σ_(N) _(P) ^((l))=σ_(N) _(T) ^((l))  (8)

Note that we use index N_(P) and N_(T) to indicate the state after the last symbol of the CP (index N_(P)−1) and of the complete block (index N_(T)−1) respectively.

To avoid interblock interference, the length N_(P) of the CP is chosen such that N_(P)>L_(C)+L where L_(C)T is the length of the channel delay spread. Because a_(p) ^((l))=a_(s) ^((l)), condition (8) is then automatically satisfied. As we show now, condition (7) can be satisfied by inserting an intrafix a_(i) ^((l)) of K data-dependent symbols in each block. We assume the modulator remembers its state after modulating block l−1, and starts from that state modulating block l:

χ₀ ^((l))=χ_(N) _(T) ^((l-1))  (9)

This is done to guarantee phase continuity between blocks. Again we use index N_(T) to indicate the state after the last symbol of block l−1. We now define

$\begin{matrix} {\xi_{n}^{(I)} = {\left\lbrack {{h\; \pi {\sum\limits_{i = 0}^{n}a_{i}^{(I)}}} + {\sum\limits_{k = 0}^{I - 1}\xi_{N_{T} - 1}^{(k)}}} \right\rbrack {mod}\; 2\; \pi}} & (10) \end{matrix}$

and call it the cumulative state. It is very similar to the phase state, but it includes all symbols up to the current interval n in block l. With this new concept, and because we know condition (8) is always satisfied, condition (7) is equivalent to

ξ_(N) _(P) ₋₁ ^((l))=ξ_(N) _(T) ₋₁ ^((l))  (11)

or

ξ_(N) _(T) ₋₁ ^((l)−ξ) _(N) _(P) ₋₁ ^((l))=0 mod 2π  (12)

Inserting definition (10) this becomes

$\begin{matrix} {\left\lbrack {{h\; \pi {\sum\limits_{i = 0}^{N_{T} - 1}a_{i}^{(I)}}} + {\sum\limits_{k = 0}^{I - 1}\xi_{N_{T} - 1}^{(k)}} - {h\; \pi {\sum\limits_{i = 0}^{N_{P} - 1}a_{i}^{(I)}}} - {\sum\limits_{k = 0}^{I - 1}\xi_{N_{T} - 1}^{(k)}}} \right\rbrack = {{h\; \pi \; {\sum\limits_{i = N_{P}}^{N_{T} - 1}a_{i}^{(I)}}} = {0\; {mod}\; 2\; {\pi.}}}} & (13) \end{matrix}$

We thus have to choose the symbols of the intrafix such that (11) is satisfied. Equivalently, as a_(d2) ^((l))=a_(p) ^((l)):

$\begin{matrix} {{h\; {\pi \left\lbrack {{\sum\limits_{i = 0}^{N - K - 1}a_{i}^{(I)}} + {\sum\limits_{i = {N - K}}^{N - 1}a_{i}^{(I)}}} \right\rbrack}} = {0\; {mod}\; 2\; {\pi.}}} & (14) \end{matrix}$

This result can be interpreted as follows. The intrafix (in (14) the second term) forces the CPM modulator after the N^(th) symbol into the same cumulative state as where it was after the previous block, by cancelling the rotation caused by the symbols of the current block (in (14) the first term). It is not relevant which particular state this is, as long as it is the same at both instants. We therefore do not need any information on the previous blocks, enabling us to work on a per-block basis.

The length of the intrafix is determined so that (14) can always be satisfied, i.e. a minimum required length is determined. It obviously needs to be long enough to return to a certain state from any other possible state. Moreover, the physical trellis of a CPM scheme is sometimes time-dependent, which brings an additional constraint on the length of the block and the intrafix. For FDE, the Discrete Fourier Transform (DFT) of the block needs to be taken, so we want to choose N a power of 2. We first do the reasoning for M=2 and generalize afterwards.

Although CPM signals are in principle conceivable for any value of the modulation index h, a key to the development of practical maximum likelihood detectors is to consider schemes with rational values of h. We therefore choose h=m/p where m and p have no common factors. Three possible situations can occur, depending on whether m and p are odd or even.

a) Even m, odd p: If m is even and p is odd, (14) is satisfied if

$\begin{matrix} {{{\sum\limits_{i = 0}^{N - K - 1}a_{i}^{(I)}} + {\sum\limits_{i = {N - K}}^{N - 1}a_{i}^{(I)}}} = {0\; {mod}\; p}} & (15) \end{matrix}$

Below we suppose that N−K>p. By choosing N−K even, the first term in (15) can then take the values

−p+1, . . . , −2,0,2, . . . , p−1=0,1,2,3, . . . , p−1 mod p.  (16)

Remembering that a_(n) ε{1,−1}, it can be easily seen that an intrafix of length p−1 (in this case an even number) can also take all these values and is sufficiently long.

Note that this case (even m, odd p) is the only one where CPM sheme has p phase states. This explains why (15) has to be evaluated modulo p. In the next two cases (odd m and odd or even p), the CPM scheme will have 2p phase states, and the respective equations will have to be evaluated modulo 2p.

b) Odd m, even p: If m is odd and p is even, (14) is satisfied if

$\begin{matrix} {{{\sum\limits_{i = 0}^{N - K - 1}a_{i}^{(I)}} + {\sum\limits_{i = {N - K}}^{N - 1}a_{i}^{(I)}}} = {0\; {mod}\; 2\; p}} & (17) \end{matrix}$

By choosing N−K odd, the first term in (17) can take the values

−2p+1, . . . , −3,−1,1,3, . . . , 2p−1=1,3, . . . , 2p−1 mod 2p  (18)

It can be seen that also in this case an intrafix of length K=p−1 (an odd number this time) can take on all these values and is therefore sufficiently long. For instance, the largest value (2p−1 mod 2p) can be seen to equal −1 mod 2p. The remaining (even) number of elements in the term can then be chosen alternatively as 1 and −1 so that they always cancel out each other. We have thus taken into account all available knowledge about h and S to show that the first term in (17) can only take a restricted number of values between 0 and 2p. This allows us to choose the smallest possible value for K.

c) Odd m, odd p: If m is odd and p is odd, finally, the condition for (14) to be satisfied remains (17). Like in the two previous cases, we choose K=p−1. As p is now odd, K and N−K are even. The first term in (17) can then take on the values

−2p+2, . . . , −2,0,2, . . . , 2p−2=0,2, . . . , 2p−2 mod 2p  (19)

An intrafix of length K=p−1 can take on all these even values and is therefore again sufficiently long. For binary signaling (M=2), we can conclude that if we choose N even and K=p−1, (14) can always be satisfied. We can now easily generalize this result towards M-ary signaling.

With M-ary signaling, we can move ‘M−1 times faster’ to a certain state, so the general constraint becomes

$\begin{matrix} {K = \left\lceil \frac{p - 1}{M - 1} \right\rceil} & (20) \end{matrix}$

Where ┌x┐ is the smallest integer greater than or equal to x. Of course the odd/even constraints on K discussed above, still have to be respected.

These three cases will be discussed with one example each, illustrated by FIG. 3. Without loss of generality, suppose that we start in cumulative state 1 at the beginning of the block, and we want to return to this state after the intrafix. The reasoning is done for binary signaling to keep the examples simple, but it is also valid for M-ary signaling.

a) Even m, odd p: When h=2/3, there are three possible cumulative states. With N−K even, we can end up in any state before the intrafix. We can indeed always return to state 1 with p−1=2 symbols. Note that 1 symbol would not be enough to ‘return’ to state 1 coming from state 1.

b) Odd m, even p: When h=1/2, there are four possible cumulative states. With N−K odd, we can end up in states 2 or 4 right before the intrafix. We can thus always return to state 1 with p−1=1 symbol.

c) Odd m, odd p: When h=1/3, there are six possible cumulative states. With N−K even, we can end up in states 1, 3 or 5 before the intrafix. With p−1=2 we can always return to state 1. Note that with 2 symbols we can also ‘stay’ in state 1.

In another embodiment, the method for generating a data block uses a precoded continuous phase modulation scheme. Differential encoding can be applied to the class of binary CPM signals with

h=1/(2Q)  (21)

Where Q ε

to annihilate the inherent differential decoding of CPM signals and thus improve error performance for coherent detection. This precoding halves the BER compared to nonprecoded CPM without any overhead or complexity increase. However, it also imposes additional constraints on the block structure. These constraints have to be taken into account to enable FDE.

Before calculating the intrafix, we explain how the sent symbols a can be extracted from the received CPM waveform. Exploiting the Laurent decomposition [2], (1) can be written as a sum of P=2^(L−1) linearly modulated signals:

$\begin{matrix} {{s(t)} = {\sum\limits_{p = 0}^{P - 1}{\sum\limits_{n}{b_{p,n}{I_{p}\left( {t - {nT}} \right)}}}}} & (22) \end{matrix}$

Where pseudocoefficients b_(p,n) are given by:

$\begin{matrix} {b_{p,n} = {\exp \left\lbrack {j\; \pi \; {h\left( {{\sum\limits_{i = 0}^{n}a_{i}} - {\sum\limits_{i = 1}^{L - 1}{a_{n - i}\beta_{p,i}}}} \right)}} \right\rbrack}} & (23) \end{matrix}$

With β_(p,i) the i^(th) bit in the binary representation of p (p=Σ_(i=1) ^(L−1)2^(i−1)β_(p,i)). The Laurent pulses l_(p)(t), p=0, . . . , P−1 are real, with l_(p)(t)=0 for t<0 and t>(L+1)T. Using (22), a Viterbi processor can generate an estimate of {circumflex over (b)}₀, both in the nonprecoded and in the precoded case.

A Viterbi receiver can be used to generate a maximum likelihood estimate of the first pseudo-coefficient, from where a can be uniquely determined by b₀. We can therefore extract the estimate of the input symbols â from the estimate {circumflex over (b)}₀ without losing any information:

$\begin{matrix} {{\hat{b}}_{0,n} = {{\exp \left( {j\; \pi \; h{\sum\limits_{i = 0}^{n}{\hat{a}}_{i}}} \right)}.}} & (24) \end{matrix}$

If we do not apply any precoding, the detection goes as follows. Equation (24) can be written as:

$\begin{matrix} \begin{matrix} {{{\hat{b}}_{0,n} = {\exp \left( {{j\pi}\; h{\sum\limits_{i = 0}^{n - 1}{\hat{a}}_{i}}} \right)}},{\exp \left( {j\; \pi \; h{\hat{a}}_{n}} \right)}} \\ {{= {\hat{b}}_{0,{n - 1}}},{{\exp \left( {j\; \pi \; h\; {\hat{a}}_{n}} \right)}\mspace{14mu} {and}\mspace{14mu} {as}}} \\ {{{{\hat{b}}_{0,{n - 1}}} = 1},{\hat{b}}_{0,{n - 1}}^{- 1}} \\ {= {{\hat{b}}_{0,{n - 1}}^{*}\mspace{14mu} {so}}} \end{matrix} & (25) \\ {{\exp \left( {{j\pi}\; h{\hat{a}}_{n}} \right)} = {{\hat{b}}_{0,n} \cdot {\hat{b}}_{0,{n - 1}}^{*}}} & (26) \end{matrix}$

In the very popular case of h=1/2 for instance, the input symbols can be estimated as

â _(n) =−j·{circumflex over (b)} _(0,n) ·{circumflex over (b)} _(0,n-1)*  (27)

One error in {circumflex over (b)}_(o) will on average cause two errors in â. We want to avoid this by applying a precoding.

In the precoder, the information bits i, i_(n) ε{0,1} are first differentially encoded to obtain the sequence p, p_(n) ε{0,1}:

p_(n)=i_(n)⊕i_(n-1)  (28)

Where ⊕ represents the modulo 2 addition. This sequence is then mapped on the CPM symbols a, a_(n)ε{−1,1};

a _(n)=2p _(n)−1=2(i _(n) ⊕i _(n-1))−1  (29)

Substituting this in (24) yields

$\begin{matrix} \begin{matrix} {{\hat{b}}_{0,n} = {\exp\left( {{j\; \frac{\pi}{2Q}{\sum\limits_{i = 0}^{n}{2\left( {{\hat{i}}_{i} \oplus {\hat{i}}_{i - 1}} \right)}}} - 1} \right)}} \\ {= {{\exp\left( {{- j}\; \frac{\pi}{2Q}n} \right)} \cdot {\exp\left( {j\; \frac{\pi}{Q}{\sum\limits_{i = 0}^{n}\left( {{\hat{i}}_{i} \oplus {\hat{i}}_{i - 1}} \right)}} \right)}}} \end{matrix} & (30) \end{matrix}$

If we assume (explained below)

î⁻¹=0  (31)

and as i_(n)⊕i_(n)=0, (30) becomes:

$\begin{matrix} {{\hat{b}}_{0,n} = {{\exp\left( {{- j}\; \frac{\pi}{2Q}n} \right)} \cdot {\exp\left( {j\; \frac{\pi}{Q}{\hat{i}}_{n}} \right)}}} & (32) \end{matrix}$

For h=1/2 for instance, it can be seen that

$\begin{matrix} {{\hat{i}}_{n} = \frac{{{\hat{b}}_{0,n} \cdot ^{j\; \frac{\pi}{2}n}} - 1}{2}} & (33) \end{matrix}$

Contrary to (27), one error in {circumflex over (b)}_(o) will now on average cause only one error in î the information bits. This is what we wanted to obtain by precoding the information bits.

An extra constraint is imposed by the precoding. At the beginning of each block (i.e. at n=0), we initialize the encoder (28) by setting i⁻¹=0, such that assumption (31) is valid. To be able to start decoding correctly at the receiver after the deletion of the CP (i.e. at n=N_(P)), we have to bring the transmitter in this same state at n=N_(P). We therefore also have to satisfy

χ₀ ^((l))=χ_(N) _(P) ^((l))  (34)

or because a_(p) ^((l))=[a_(d2) ^((l));a_(i2) ^((l))] by definition

χ_(N) ^((l)=χ) _(N) _(T) ^((l))  (35)

We can satisfy both (6) and (35) easily by inserting two intrafixes into each block as shown in FIG. 1 c. We first insert the second intrafix a_(i2) ^((l)) of length

$K = {\left\lceil \frac{p - 1}{M - 1} \right\rceil + L - 1}$

to satisfy (35). This length is needed because both the phase state and the correlative state have to be compensated to enable correct decoding at the receiver. The intrafix is therefore calculated such that

$\begin{matrix} {{h\; \pi \; \left( {{\sum\limits_{n = 0}^{N_{P} - K - 1}a_{{d\; 2},n}^{(I)}} + {\sum\limits_{n = 0}^{K - 1}a_{{i\; 2},n}^{(I)}}} \right)} = {0\; {mod}\; 2\pi}} & (36) \end{matrix}$

Next, the first intrafix a_(i1) ^((l)) is calculated to satisfy (6):

$\begin{matrix} {{h\; \pi \; \left( {{\sum\limits_{n = 0}^{N - N_{P} - K - 1}a_{{d\; 1},n}^{(I)}} + {\sum\limits_{n = 0}^{K - 1}a_{{i\; 1},n}^{(I)}}} \right)} = {0\; {mod}\; 2\pi}} & (36) \end{matrix}$

This intrafix only has to be of length

$K = \left\lceil \frac{p - 1}{M - 1} \right\rceil$

because only the phase state has to be compensated, as the correlative state condition is satisfied automatically. Finally, the CP is inserted. The last N_(P) symbols [a_(d2) ^((l)); a_(i2) ^((l))] of each block are copied in front of the block, creating blocks of length N_(T)=N+N_(P) at the transmitter. The complete system model is shown in FIG. 2 c.

The above embodiments use a cyclic prefix. In an embodiment, a training sequence (TS) is used instead of a cyclic prefix (CP). A TS offers additional known symbols and therefore enables better synchronization and—potentially—channel estimation, while keeping the same performance as with a CP.

In the case of a TS, also memory can be taken into account when inserting the TS in the data structure. The condition to get a cyclic CPM signal with period NT after discarding the CP becomes:

χ₀ ^((l))=χ_(N) ^((l))  (38)

Or equivalently:

θ₀ ^((l))=θ_(N) ^((l))  (39)

And

σ₀ ^((l))=σ_(N) ^((l))  (40)

In the case of a TS, the previous presented technique can readily be applied to satisfy (38). However, (39) is not satisfied automatically, therefore the last L−1 symbols of a_(i) ^((l)) have to chosen such that

(a _(N-1) ^((l)),a _(N-2) ^((l)), . . . , a _(N-L+1) ^((l)))=(a _(N-1) ^((l−1)) , a _(N-2) ^((l−1)) , . . . , a _(N-L+1) ^((l−1))).  (41)

If these symbols are chosen in this way, a_(n) ^((l))=a_(n) ^((l′)) for all l,l′ and for n=N−L+1 . . . N−1. Therefore, the intrafix is independent of the block index and information about previous blocks is not needed. The total length of the intrafix in the case of a TS then becomes:

$\begin{matrix} {K = {\left\lceil \frac{p - 1}{M - 1} \right\rceil + L - 1}} & (42) \end{matrix}$

Where

$\left\lceil \frac{p - 1}{M - 1} \right\rceil$

symbols are used to satisfy (38) and the remaining L−1 symbols are chosen to satisfy (39).

It can be desirable—though not necessary to guarantee cyclicity of the block—that the TS is designed such that χ₀ ^((l))=χ_(N) _(P) ^((l)). This can be satisfied by including an additional intrafix TS_(i) in the TS itself, as shown in FIG. 1 b. As the whole TS is composed of known symbols, this does not entail a loss of net data rate.

One embodiment of the method will be illustrated in a 60 GHz environment, but can be used in any other occurrence where CPM is used. The 60 GHz channel is severely frequency-selective for the targeted signal bandwidth. Equalizing such channels in the frequency domain rather than in the time domain can sufficiently lower the computational complexity of the system. Simulations were performed with the proposed method and a CPM-FDE. A linear equalizer is first applied to cancel the intersymbol interference (ISI) introduced by the channel. The minimum mean square error (MMSE) channel equalizer is chosen. The systems are shown in FIG. 2. The binary 3-RC CPM scheme

$\left( {{M = 2},{{f(t)} = {{\left( {1 - {\cos \; \frac{2\; \pi \; t}{LT}}} \right)/2}{LT}}}} \right.$

with L=3) is used. Modulation index h=0.5 and h=0.25 are chosen. The former scheme closely resembles Gaussian Minimum Shift Keying (GMSK). The latter scheme uses a smaller bandwidth, at the expense of an increased Bit Error rate (BER). As a huge bandwidth is available at 60 GHz, the bit rate is R_(b)=1 Gbits/s. A blocksize N=256 and CP or TS length N_(P)=64 are chosen. The receiver lowpass filter is modelled as a raised cosine filter with roll-off factor R=0.5.

FIG. 4 shows the BER performance in the 60 GHz environment both with a CP and a TS. To verify the simulation framework, a reference curve in additive white Gaussian noise (AWGN) is also provided for the h=0.5 case. Comparing the TS and CP curves, it can be seen that the CP performance is slightly better. This is because in the case of a CP,

$\frac{N}{N + N_{P}}$

of the total available energy is available for useful bits, whereas in the case of a TS this is only

$\frac{N - N_{P}}{N}.$

For N=256 and N_(P)=64, this yields 80% for the CP, and only 75% for the TS. This “loss” explains the small gap between the CP and TS curves. For two reasons we can conclude that both the CP and the TS constructions satisfy all requirements, both for the h=0.5 and the h=0.25 cases. First, the CP or TS is sufficiently long. Otherwise interblock interference (IBI) would not be mitigated, causing BER flooring. Second, the intrafix is correctly calculated in both cases, yielding a cyclic CPM signal. This can again be seen from the fact that no BER flooring occurs, so that we can conclude that the FD equalizer operates correctly.

FIG. 4 also shows the BER of the precoded h=0.25 and h=0.5 CPM schemes in the 60 GHz environment. As can be seen, precoding approximately reduces the BER by half. We can therefore conclude that the precoding and the FDE cooperate correctly.

The foregoing description details certain embodiments of the invention. It will be appreciated, however, that no matter how detailed the foregoing appears in text, the invention may be practiced in many ways. It should be noted that the use of particular terminology when describing certain features or aspects of the invention should not be taken to imply that the terminology is being re-defined herein to be restricted to including any specific characteristics of the features or aspects of the invention with which that terminology is associated.

While the above detailed description has shown, described, and pointed out novel features of the invention as applied to various embodiments, it will be understood that various omissions, substitutions, and changes in the form and details of the device or process illustrated may be made by those skilled in the technology without departing from the spirit of the invention. The scope of the invention is indicated by the appended claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.

REFERENCES

References, hereby incorporated by reference in their entirety:

-   [1] F. Pancaldi and G. M. Vitetta, “Equalization algorithms in the     frequency domain for continuous phase modulation,” IEEE Trans.     Commun., vol. 54, no. 4, pp. 648-658, April 2008. -   [2] P. A. Laurent, “Exact and approximate construction of digital     phase modulations by superposition of amplitude modulated pulses     (AMP),” IEEE Trans. Commun., vol. 34, no. 2, pp. 150-160, February     1986. 

1. A method of generating a data block for transmission using a continuous phase modulation scheme, the method comprising: inserting payload data in the data block, the payload data comprising a plurality of payload symbols, each involving a state change in a continuous phase modulation waveform generated from the data block; and inserting state compensation data in the data block for cancelling out the state changes, such that the waveform has an end state at the end of the data block equal to a begin state at the beginning of the data block, wherein the state compensation data is determined by a) determining from the state changes an overall state change caused by the payload data over the waveform, and b) selecting a set of compensation symbols for the state compensation data on the basis of the overall state change, the compensation symbols each involving a state change in the waveform and collectively cancelling out the overall state change.
 2. The method according to claim 1, wherein the state compensation data is placed on predetermined positions in the data block.
 3. The method according to claim 1, wherein the continuous phase modulation scheme comprises predetermined modulation parameters and wherein the state compensation data is organized as a subblock having a minimum required length which is determined on the basis of at least one of the modulation parameters.
 4. The method according to claim 3, wherein one of the predetermined modulation parameters is a modulation index.
 5. The method according to claim 1, wherein each of the state changes comprises a phase rotation.
 6. The method according to claim 5, wherein each of the state changes further comprises a correlative state change.
 7. The method according to claim 1, wherein the continuous phase modulation scheme is a precoded continuous phase modulation scheme, the data block forming part of a larger data structure in which the data block is sandwiched between an equal cyclic pre- and postfix.
 8. The method according to claim 7, wherein the cyclic pre- and postfixes also comprise the payload data and the state compensation data.
 9. The method according to claim 1, wherein the continuous phase modulation scheme is a precoded continuous phase modulation scheme, the data block forming a cyclic pre- and postfix provided on opposite sides of another data block in a larger data structure.
 10. The method according to claim 1, wherein the data block is preceded by a training sequence.
 11. A communication system implementing the method of claim 1, the system comprising a transmitter having a block for determining and inserting the state compensation data in the data block and a receiver having a block for detecting and removing the state compensation data from the data block.
 12. A device for generating a data block for transmission using a continuous phase modulation scheme, the device comprising: means for inserting payload data in the data block, the payload data comprising a plurality of payload symbols, each involving a state change in a continuous phase modulation waveform generated from the data block; and means for inserting state compensation data in the data block for cancelling out the state changes, such that the waveform has an end state at the end of the data block equal to a begin state at the beginning of the data block, wherein the state compensation data is determined by a) determining from the state changes an overall state change caused by the payload data over the waveform, and b) selecting a set of compensation symbols for the state compensation data on the basis of the overall state change, the compensation symbols each involving a state change in the waveform and collectively cancelling out the overall state change.
 13. A device for generating a data block for transmission using a continuous phase modulation scheme, the device comprising: a payload insertion module configured to insert payload data in the data block, the payload data comprising a plurality of payload symbols, each involving a state change in a continuous phase modulation waveform generated from the data block; and a state compensation insertion module configured to insert state compensation data in the data block for cancelling out the state changes, such that the waveform has an end state at the end of the data block equal to a begin state at the beginning of the data block, wherein the state compensation data is determined by a) determining from the state changes an overall state change caused by the payload data over the waveform, and b) selecting a set of compensation symbols for the state compensation data on the basis of the overall state change, the compensation symbols each involving a state change in the waveform and collectively cancelling out the overall state change.
 14. The device according to claim 13, wherein the state compensation data is placed on predetermined positions in the data block.
 15. The device according to claim 13, wherein the continuous phase modulation scheme comprises predetermined modulation parameters and wherein the state compensation data is organized as a subblock having a minimum required length which is determined on the basis of at least one of the modulation parameters.
 16. The device according to claim 13, wherein each of the state changes comprises a phase rotation.
 17. The device according to claim 17, wherein each of the state changes further comprises a correlative state change.
 18. The device according to claim 13, wherein the continuous phase modulation scheme is a precoded continuous phase modulation scheme, the data block forming part of a larger data structure in which the data block is sandwiched between an equal cyclic pre- and postfix.
 19. The device according to claim 13, wherein the continuous phase modulation scheme is a precoded continuous phase modulation scheme, the data block forming a cyclic pre- and postfix provided on opposite sides of another data block in a larger data structure.
 20. The device according to claim 13, wherein the data block is preceded by a training sequence. 